1. Field of the Invention
The present invention relates to a semiconductor device having an integrated circuit, and more particularly, it relates to an improvement for enabling direct detection of the phase of an internal signal of the integrated circuit on the outside of the semiconductor device.
2. Description of the Background Art
A generally known semiconductor device having an integrated circuit in a semiconductor chip is so structured as to output an internal signal generated in the integrated circuit to an external device as a monitor signal in response to an externally input mode switching signal. FIG. 20 is a circuit diagram showing part of a conventional semiconductor device having such a structure. When an externally input mode switching signal SMM is active (high in the example shown in FIG. 20), an internal signal is output as a monitor signal through a NAND circuit 90 serving as a logic switch and an inverter 91. The monitor signal is output to bonding pads formed on the semiconductor chip or external pins which are terminals exposed outward from a sealing body. Another known semiconductor device outputs a monitor signal to an NC (Non-Connect) pin among external pins. The mode switching signal SMM has a function of switching the operation mode of the semiconductor device between a normal operation mode implementing the original function of the integrated circuit and a test mode for monitoring the internal signal.
Thus, a semiconductor device directly outputting an internal signal to bonding pads of a semiconductor chip or external pins of the semiconductor device by shifting its operation mode to a test mode has been known in general. Following recent increase in speed and frequency of the integrated circuit, however, it is necessary not only to simply monitor the internal signal but also to control phase difference at a local level in the semiconductor chip. This is because a setup time between two signals is so reduced in response to the increased speed that internal timing in the semiconductor chip must inevitably be settled even if the timing of an external signal is settled. In order to ascertain the operation limit of the integrated circuit, timing accuracy is required not only on the external pins but also in the semiconductor chip. Under such circumstances, awaited is a semiconductor device enabling phase comparison between signals at the internal level of the semiconductor chip.
FIG. 21 is a circuit diagram showing an exemplary circuit employed in an SDRAM (synchronous dynamic RAM). This circuit is so structured as to compare phases between a signal EXTCKE (external clock enable signal) and a signal EXTCLK (external clock signal). The signal EXTCKE is buffered by a clock buffer 92, to thereafter control clocked inverters 94 and 97 as a signal INTCKE (internal clock enable signal). The signal EXTCLK is buffered by a clock buffer 93, passed as a signal INTCLK (internal clock signal) through the clocked inverter 94, a latch formed by two inverters 95 and 96, the clocked inverter 97 and a latch formed by two inverters 98 and 99, and thereafter transmitted to an integrated circuit as an internal signal.
The signal EXTCLK or INTCLK, supplied from a clock generator (not shown) in a constant cycle, is not arbitrarily changeable. On the other hand, the signal EXTCKE or INTCKE is an asynchronous signal arbitrarily changeable in timing with respect to the signal EXTCLK or INTCLK. As shown in a timing chart of FIG. 22, therefore, an internal signal is changed by changing the timing of the signal EXTCKE.
Referring to FIG. 22, the signal EXTCKE is low and the internal signal is undefined at a time t0. A hatched part in FIG. 22 expresses that the value of the internal signal is undefined. The signal EXTCKE goes high at a time T1, and goes low at a time T4. When the signal INTCLK is high between times T2 and T3, the internal signal is also high. When the signal INTCLK goes high after the time T4, however, the signal INTCLK (part denoted by symbol P in FIG. 22) is not reflected on the internal signal. In other words, an operation neglecting the signal INTCLK appears on the integrated circuit when the signal INTCKE is low. Thus, the operation of the integrated circuit varies with the phase relation between the signals INTCLK and INTCKE, and hence the phase difference between the two signals can be indirectly monitored by varying the timing of the signal EXTCKE and investigating the current operation of the integrated circuit.
However, the circuit shown in FIG. 21 is employed in a normal operation mode, and hence phase difference between an arbitrary internal signal and an external signal cannot be monitored with the circuit shown in FIG. 21. Further, the phase difference between two signals can be not directly but only indirectly monitored through the operation of the integrated circuit.
An object of the present invention is to provide a semiconductor device enabling direct detection of the phase of an internal signal and a method of inspecting this semiconductor device.
According to a first aspect of the present invention, a semiconductor device has M (Mxe2x89xa71) semiconductor substrates, and each of the M semiconductor substrates comprises an integrated circuit, a phase comparison circuit comparing phases between an internal signal generated in the integrated circuit and an external signal input from outside the semiconductor device and outputting the result as a monitor signal and a monitor signal pad for outputting the monitor signal.
The semiconductor device according to the first aspect compares the phases in each semiconductor substrate, whereby precision of the signal phases can be determined in the semiconductor substrate. Therefore, phase difference can be controlled at a local level in the semiconductor substrate. Further, the monitor signal reflecting the phase difference can be extracted outward through the monitor signal pad, whereby the phase difference can be directly monitored.
According to a second aspect of the present invention, a semiconductor device has M (Mxe2x89xa71) semiconductor substrates, and each of the M semiconductor substrates comprises an integrated circuit having a data wire for outputting a data signal, a phase comparison circuit comparing phases between an internal signal generated in the integrated circuit and an external signal input from outside the semiconductor device and outputting the result as a monitor signal and a first drive circuit outputting the monitor signal to the data wire.
The semiconductor device according to the second aspect compares the phases in each semiconductor substrate, whereby precision of the signal phases can be determined in the semiconductor substrate. Therefore, phase difference can be controlled at a local level in the semiconductor substrate. Further, the monitor signal reflecting the phase difference can be extracted outward through the data wire, whereby the phase difference can be directly monitored. In addition, neither pad nor terminal is required for extracting the monitor signal outward.
According to a third aspect of the present invention, the integrated circuit further has a second drive circuit outputting the data signal to the data wire, the phase comparison circuit compares the phases and the first drive circuit outputs the monitor signal to the data wire only when a mode switching signal input from outside the semiconductor device is at a specific value, and the second drive circuit outputs the data signal to the data wire only when the mode switching signal is not at the specific value, in the semiconductor device according to the second aspect.
In the semiconductor device according to the third aspect, the first and second drive circuits so exclusively operate that signal collision can be prevented on the data wire.
According to a fourth aspect of the present invention, the phase comparison circuit compares the phases only when a mode switching signal input from outside the semiconductor device is at a specific value, in the semiconductor device according to the first or second aspect.
In the semiconductor device according to the fourth aspect, the phase comparison circuit operates in response to the mode switching signal, whereby a useless operation can be prevented when no test is executed.
According to a fifth aspect of the present invention, the phase comparison circuit receives one of a single or plurality of input signals received in the integrated circuit as the mode switching signal, in the semiconductor device according to the third or fourth aspect.
In the semiconductor device according to the fifth aspect, the phase comparison circuit receives one of a single or plurality of input signals received in the integrated circuit as the mode switching signal, whereby neither pad nor terminal is required for inputting the mode switching signal.
According to a sixth aspect of the present invention, the phase comparison circuit receives one of a single or plurality of input signals received in the integrated circuit as the external signal, in the semiconductor device according to any one of the first to fifth aspects.
In the semiconductor device according to the sixth aspect, the phase comparison circuit receives one of a single or plurality of input signals received in the integrated circuit as the external signal, whereby neither pad nor terminal is required for inputting the external signal.
According to a seventh aspect of the present invention, each of the M semiconductor substrates further comprises a selection circuit selecting one of a plurality of signals generated in the integrated circuit in response to a selection signal and inputting the same in the phase comparison circuit as the internal signal in the semiconductor device according to any one of the first to sixth aspects.
The semiconductor device according to the seventh aspect comprises the selection circuit, whereby one of a plurality of internal signals can be freely selected as the object of phase comparison.
According to an eight aspect of the present invention, the selection circuit receives at least part of a single or plurality of input signals received in the integrated circuit as the selection signal, in the semiconductor device according to the seventh aspect.
In the semiconductor device according to the eighth aspect, the selection circuit receives at least part of a single or plurality of input signals received in the integrated circuit as the selection signal, whereby neither pad nor terminal is required for inputting the selection signal.
According to a ninth aspect of the present invention, the selection circuit receives a signal obtained by converting at least part of a single or plurality of input signals received in the integrated circuit as the selection signal, in the semiconductor device according to the seventh aspect.
In the semiconductor device according to the ninth aspect, the selection circuit receives the signal obtained by converting at least part of a single or plurality of input signals received in the integrated circuit as the selection signal, whereby neither pad nor terminal is required for inputting the selection signal.
According to a tenth aspect of the present invention, the semiconductor device according to the first aspect further comprises a sealing body sealing the M semiconductor substrates and a monitor signal terminal electrically connected to the monitor signal pad belonging to each of the M semiconductor substrates and exposed outward from the sealing body.
The semiconductor device according to the tenth aspect comprises the monitor signal terminal, whereby the monitor signal can be externally input in the semiconductor device as a product sealed with the sealing body.
According to an eleventh aspect of the present invention, each of the M semiconductor substrates further comprises a mode switching signal pad receiving the mode switching signal, in the semiconductor device according to the third or fourth aspect.
The semiconductor device according to the eleventh aspect comprises the mode switching signal pad, whereby the mode switching signal can be readily input through the pad.
According to a twelfth aspect of the present invention, the semiconductor device according to the eleventh aspect further comprises a sealing body sealing the M semiconductor substrates and a mode switching signal terminal electrically connected to the mode switching signal pad belonging to each of the M semiconductor substrates and exposed outward from the sealing body.
The semiconductor device according to the twelfth aspect comprises the mode switching signal terminal, whereby the mode switching signal can be externally input in the semiconductor device as a product sealed with the sealing body.
According to a thirteenth aspect of the present invention, each of the M semiconductor substrates further comprises an external signal pad receiving the external signal in the semiconductor device according to any one of the first to fifth aspects.
The semiconductor device according to the thirteenth aspect comprises the external signal pad, whereby the external signal can be readily input through the pad.
According to a fourteenth aspect of the present invention, the semiconductor device according to the thirteenth aspect further comprises a sealing body sealing the M semiconductor substrates and an external signal terminal electrically connected to the external signal pad belonging to each of the M semiconductor substrates and exposed outward from the sealing body.
The semiconductor device according to the fourteenth aspect comprises the external signal terminal, whereby the external signal can be externally input in the semiconductor device as a product sealed with the sealing body.
According to a fifteenth aspect of the present invention, each of the M semiconductor substrates further comprises a selection signal pad receiving the selection signal, in the semiconductor device according to the seventh aspect.
The semiconductor device according to the fifteenth aspect comprises the selection signal pad, whereby the selection signal can be readily input through the pad.
According to a sixteenth aspect of the present invention, the semiconductor device according to the fifteenth aspect further comprises a sealing body sealing the M semiconductor substrates and a selection signal terminal electrically connected to the selection signal pad belonging to each of the M semiconductor substrates and exposed outward from the sealing body.
The semiconductor device according to the sixteenth aspect comprises the selection signal terminal, whereby the selection signal can be externally input in the semiconductor device as a product sealed with the sealing body.
According to a seventeenth aspect of the present invention, M is greater than or equal to 2 in the semiconductor device according to any one of the first to sixteenth aspects.
The semiconductor device according to the seventeenth aspect comprises a plurality of semiconductor substrates, whereby a phase shifting of the internal signals can be measured between the plurality of semiconductor substrates.
According to an eighteenth aspect of the present invention, a method of inspecting a semiconductor device comprises steps of (a) preparing the semiconductor device according to any one of the first to sixteenth aspects and (b) inspecting the semiconductor device prepared in the step (a) by operating the phase comparison circuit belonging to each of the M semiconductor substrates.
In the method according to the eighteenth aspect, the semiconductor device can be inspected by operating the phase comparison circuit. The phases are compared in each semiconductor substrate, whereby precision of the signal phases can be determined in the semiconductor substrate. Therefore, phase difference can be controlled at a local level in the semiconductor substrate. Further, the monitor signal reflecting the phase difference can be extracted outward through the monitor signal pad or the data wire, whereby the phase difference can be directly monitored.
According to a nineteenth aspect of the present invention, the step (b) comprises steps of (b-1) measuring the signal width of the internal signal of the integrated circuit belonging to each of the M semiconductor substrates and (b-2) comparing the signal width with a standard value thereby sorting out the semiconductor device, in the method of inspecting a semiconductor device according to the eighteenth aspect.
In the method according to the nineteenth aspect, a semiconductor device can be sorted out, reflecting the degree of its operating speed, on the basis of the signal width of the internal signal through the characteristics of the semiconductor device according to the present invention.
According to a twentieth aspect of the present invention, M is greater than or equal to 2, and the step (b) comprises a step (b-1) of measuring a phase shift of the internal signal between the M semiconductor substrates, in the method of inspecting a semiconductor device according to the eighteenth aspect.
In the method according to the twentieth aspect, a phase shifting of the internal signals can be measured between the plurality of semiconductor substrates due to the characteristics of the semiconductor device according to the present invention having a plurality of semiconductor substrates, thereby contributing to evaluation of the semiconductor device or control of the phase difference.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.